Host systems often send commands to non-volatile memory systems that are associated with logical block addresses. The memory system maps the logical block addresses received with the commands to physical block addresses at the memory system. Typically, the memory system maps logical block addresses in a subset of logical address space exclusively to a subset of physical address space at the memory system known as a bank. Because of this, new commands that a host system may desire to send to a memory system may be blocked.
In one example, the blockage may occur when one or more banks of memory within the memory system operate more slowly than other banks of memory because of an asymmetrical host workload or extensive maintenance operations. In another example, blockage may occur when host command queues become full with pending commands for one or more slow banks of memory within the memory system. With some host protocols such as Native Command Queuing (NCQ), a number of outstanding commands in a host command queue, which is known a queue depth, is restricted to a maximum value. When the host command queue reaches this maximum value, the memory system is prevented from receiving further commands from the host, thereby blocking receipt of commands for the banks of memory that may be idle.
Improved non-volatile memory systems are desirable that minimize the blockage of host commands to memory systems.